From: Kevin Cernekee <cernekee@gmail.com>
Date: Sat, 19 Sep 2009 02:12:45 +0000 (-0700)
Subject: MIPS: MIPSxx SC: Avoid destructive invalidation on partial L2 cachelines.
X-Git-Tag: v2.6.32-rc3~58^2~10
X-Git-Url: http://git.openpandora.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=96983ffefce46312e9372d357309dda413553009;p=pandora-kernel.git

MIPS: MIPSxx SC: Avoid destructive invalidation on partial L2 cachelines.

This extends commit a8ca8b64e3fdfec17679cba0ca5ce6e3ffed092d to cover
MIPSxx-style board cache code.

Signed-off-by: Kevin Cernekee <cernekee@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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