From: Stephan Gerhold Date: Thu, 24 Apr 2025 09:16:43 +0000 (+0200) Subject: clk: qcom: Use setbits_le32() for qcom_gate_clk_en() X-Git-Tag: v2025.07-rc4~12^2~5 X-Git-Url: http://git.openpandora.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=94e57ba2011b4bb96c0714e02a5056bc0c7f87d0;p=pandora-u-boot.git clk: qcom: Use setbits_le32() for qcom_gate_clk_en() The other clock enable functions in clock-qcom.c use setbits_le32() to read/modify/write the enable registers. Use the same for qcom_gate_clk_en() to simplify the code a bit. Reviewed-by: Neil Armstrong Signed-off-by: Stephan Gerhold Reviewed-by: Sumit Garg Reviewed-by: Casey Connolly Link: https://lore.kernel.org/r/20250424-apq8016-clock-fixes2-v2-3-fcc371c9e45f@linaro.org Signed-off-by: Casey Connolly --- diff --git a/drivers/clk/qcom/clock-qcom.c b/drivers/clk/qcom/clock-qcom.c index 5018851725b..7a259db7934 100644 --- a/drivers/clk/qcom/clock-qcom.c +++ b/drivers/clk/qcom/clock-qcom.c @@ -76,16 +76,13 @@ void clk_enable_vote_clk(phys_addr_t base, const struct vote_clk *vclk) int qcom_gate_clk_en(const struct msm_clk_priv *priv, unsigned long id) { - u32 val; if (id >= priv->data->num_clks || priv->data->clks[id].reg == 0) { log_err("gcc@%#08llx: unknown clock ID %lu!\n", priv->base, id); return -ENOENT; } - val = readl(priv->base + priv->data->clks[id].reg); - writel(val | priv->data->clks[id].en_val, priv->base + priv->data->clks[id].reg); - + setbits_le32(priv->base + priv->data->clks[id].reg, priv->data->clks[id].en_val); return 0; }