From: Marek Vasut Date: Thu, 12 Dec 2024 13:34:31 +0000 (+0100) Subject: arm64: dts: renesas: Add R8A779G0 V4H DBSC5 and RT-VRAM DT nodes X-Git-Tag: v2025.04-rc1~17^2~25^2~16 X-Git-Url: http://git.openpandora.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=94255316db0b8c0b8f5c604419221039261e641a;p=pandora-u-boot.git arm64: dts: renesas: Add R8A779G0 V4H DBSC5 and RT-VRAM DT nodes Describe DBSC5 DRAM controller and RT-VRAM configuration interface as two new DT nodes in R-Car Gen4 R8A779G0 U-Boot DT extras file. This node is used by the U-Boot SPL for R8A779G0 SoC, where the DBSC5 and RT-VRAM drivers bind to these nodes and bring up the DRAM controller and RT-VRAM settings respectively, so U-Boot proper can be loaded into DRAM and started on Cortex A76 core. Signed-off-by: Marek Vasut --- diff --git a/arch/arm/dts/r8a779g0-u-boot.dtsi b/arch/arm/dts/r8a779g0-u-boot.dtsi index f60eba531e4..42df321178b 100644 --- a/arch/arm/dts/r8a779g0-u-boot.dtsi +++ b/arch/arm/dts/r8a779g0-u-boot.dtsi @@ -15,3 +15,21 @@ &extalr_clk { bootph-all; }; + +&soc { + ram@e6780000 { /* DBSC5 */ + compatible = "renesas,r8a779g0-dbsc"; + reg = <0 0xe6780000 0 0x80000>; + power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; + status = "okay"; + bootph-all; + }; + + ram@ffec0000 { /* RT-VRAM */ + compatible = "renesas,r8a779g0-rtvram"; + reg = <0 0xffec0000 0 0xf000>; + power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; + status = "okay"; + bootph-all; + }; +};