From: Markos Chandras <markos.chandras@imgtec.com>
Date: Thu, 13 Nov 2014 13:25:51 +0000 (+0000)
Subject: MIPS: asm: r4kcache: Add MIPS R6 cache unroll functions
X-Git-Tag: fixes-v4.0-rc1~21^2~26^2~48
X-Git-Url: http://git.openpandora.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=934c79231c1b;p=pandora-kernel.git

MIPS: asm: r4kcache: Add MIPS R6 cache unroll functions

MIPS R6 changed the 'cache' instruction opcode and reduced the
offset field to 8 bits. This means we now have to adjust the
base register every 256 bytes and as a result of which we can
no longer use the previous cache functions.

Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
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