From: Lendacky, Thomas <Thomas.Lendacky@amd.com>
Date: Wed, 2 Jul 2014 18:04:34 +0000 (-0500)
Subject: amd-xgbe: Clear the proper MTL interrupt register
X-Git-Tag: omap-for-v3.17/fixes-against-rc2~149^2~216^2~3
X-Git-Url: http://git.openpandora.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=91f873453b70fe6cdb83409bee68e1023204c381;p=pandora-kernel.git

amd-xgbe: Clear the proper MTL interrupt register

When initializing the MTL interrupts the interrupt status
register is written to instead of the interrupt enable register.
Since no MTL interrupts are being enabled and the default state
is for MTL interrupts to be disabled this did not cause a problem,
but needs to be fixed to target the correct register.

Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
---

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