From: Jorge Ramirez-Ortiz Date: Mon, 7 Apr 2025 17:56:15 +0000 (+0200) Subject: clk/qcom: apq8096: fix the sdhci clock X-Git-Tag: v2025.07-rc1~78^2~27 X-Git-Url: http://git.openpandora.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=8fc48d1a01acec2568b48b2afd6303397af593c8;p=pandora-u-boot.git clk/qcom: apq8096: fix the sdhci clock Select the right clock for sdhci. Signed-off-by: Jorge Ramirez-Ortiz Reviewed-by: Caleb Connolly Reviewed-by: Neil Armstrong Link: https://lore.kernel.org/r/20250407175617.3494506-3-jorge.ramirez@oss.qualcomm.com Signed-off-by: Caleb Connolly --- diff --git a/drivers/clk/qcom/clock-apq8096.c b/drivers/clk/qcom/clock-apq8096.c index bc00826a5e8..551f52d5197 100644 --- a/drivers/clk/qcom/clock-apq8096.c +++ b/drivers/clk/qcom/clock-apq8096.c @@ -83,7 +83,7 @@ static ulong apq8096_clk_set_rate(struct clk *clk, ulong rate) struct msm_clk_priv *priv = dev_get_priv(clk->dev); switch (clk->id) { - case GCC_SDCC1_APPS_CLK: /* SDC1 */ + case GCC_SDCC2_APPS_CLK: /* SDC2 */ return clk_init_sdc(priv, rate); break; case GCC_BLSP2_UART2_APPS_CLK: /*UART2*/