From: San Mehat <san@google.com>
Date: Mon, 16 Nov 2009 18:17:30 +0000 (-0800)
Subject: mmc: msm_sdcc: Wrap readl/writel calls with appropriate clk delays
X-Git-Tag: v2.6.35-rc1~448^2~11
X-Git-Url: http://git.openpandora.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=8b1c2ba274c8416afb7eab3bd788f98a917efe06;p=pandora-kernel.git

mmc: msm_sdcc: Wrap readl/writel calls with appropriate clk delays

As it turns out, all sdcc register writes must be delayed by at
least 3 core clock cycles for the writes to take effect. *sigh*

    Also removes the 30us constant delay on clock enable in favor
of a 3 core clock delay.

Signed-off-by: San Mehat <san@google.com>
Signed-off-by: Daniel Walker <dwalker@codeaurora.org>
---

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