From: Tuomas Tynkkynen <ttynkkynen@nvidia.com>
Date: Wed, 28 Aug 2013 15:18:47 +0000 (+0300)
Subject: clk: tegra30: Don't wait for PLL_U lock bit
X-Git-Tag: v3.12-rc1~78^2~27
X-Git-Url: http://git.openpandora.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=89ac8567b97fea558238c4bb73637471f9197813;p=pandora-kernel.git

clk: tegra30: Don't wait for PLL_U lock bit

The lock bit on PLL_U does not seem to be working correctly and
sometimes never gets set when waiting for the PLL to come up.
Remove the TEGRA_PLL_USE_LOCK flag to use a constant delay.

Signed-off-by: Tuomas Tynkkynen <ttynkkynen@nvidia.com>
Tested-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
---

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