From: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Date: Tue, 24 Jun 2008 14:26:38 +0000 (+0900)
Subject: [MIPS] cevt-txx9: Reset timer counter on initialization
X-Git-Tag: v2.6.26-rc9~64^2
X-Git-Url: http://git.openpandora.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=8986d2f50e1a9ba63f64ccbf59181886aa7898c3;p=pandora-kernel.git

[MIPS] cevt-txx9: Reset timer counter on initialization

The txx9_tmr_init() will not clear a timer counter register in a certain
case.  The counter register is cleared on 1->0 transition of TCE bit if
CRE=1.  So just clearing the TCE bit is not enough.

Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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