From: Will Deacon Date: Mon, 13 Sep 2010 15:18:30 +0000 (+0100) Subject: ARM: 6385/1: setup: detect aliasing I-cache when D-cache is non-aliasing X-Git-Tag: v2.6.37-rc1~184^2~7^2~2 X-Git-Url: http://git.openpandora.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=8925ec4c530094b878e7e28a1fd78e7122afd973;p=pandora-kernel.git ARM: 6385/1: setup: detect aliasing I-cache when D-cache is non-aliasing Currently, the Kernel assumes that if a CPU has a non-aliasing D-cache then the I-cache is also non-aliasing. This may not be true on ARM cores from v6 onwards, which may have aliasing I-caches but non-aliasing D-caches. This patch adds a cpu_has_aliasing_icache function, which is called from cacheid_init and adds CACHEID_VIPT_I_ALIASING to the cacheid when appropriate. A utility macro, icache_is_vipt_aliasing(), is also provided. Signed-off-by: Will Deacon Signed-off-by: Russell King --- Reading git-diff-tree failed