From: Dinesh Maniyam <dinesh.maniyam@intel.com>
Date: Wed, 26 Feb 2025 16:18:24 +0000 (+0800)
Subject: drivers: mtd: nand: cadence: Poll for desc complete status
X-Git-Tag: v2025.07-rc1~18^2~32^2~8
X-Git-Url: http://git.openpandora.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=880c317230a8650f3b1fca3fa6ee16adce47545c;p=pandora-u-boot.git

drivers: mtd: nand: cadence: Poll for desc complete status

Poll for thread complete status to ensure the
descriptor processing is complete. If complete then can ensure
controller already update the descriptor status.

Signed-off-by: Dinesh Maniyam <dinesh.maniyam@intel.com>
---

diff --git a/drivers/mtd/nand/raw/cadence_nand.c b/drivers/mtd/nand/raw/cadence_nand.c
index a717987be67..e571e5a6868 100644
--- a/drivers/mtd/nand/raw/cadence_nand.c
+++ b/drivers/mtd/nand/raw/cadence_nand.c
@@ -520,6 +520,7 @@ cadence_nand_cdma_send_and_wait(struct cadence_nand_info *cadence,
 {
 	struct cadence_nand_irq_status irq_mask, irq_status = {0};
 	int status;
+	u32 val;
 
 	irq_mask.trd_status = BIT(thread);
 	irq_mask.trd_error = BIT(thread);
@@ -531,6 +532,14 @@ cadence_nand_cdma_send_and_wait(struct cadence_nand_info *cadence,
 	if (status)
 		return status;
 
+	/* Make sure the descriptor processing is complete */
+	status = readl_poll_timeout(cadence->reg + TRD_COMP_INT_STATUS, val,
+				    (val & BIT(thread)), TIMEOUT_US);
+	if (status) {
+		pr_err("cmd thread completion timeout!\n");
+		return status;
+	}
+
 	cadence_nand_wait_for_irq(cadence, &irq_mask, &irq_status);
 
 	if (irq_status.status == 0 && irq_status.trd_status == 0 &&