From: Ben Dooks Date: Thu, 7 Jan 2010 02:05:55 +0000 (+0900) Subject: ARM: S3C64XX: Fix possible clock look in EPLL and MPLL clock chains X-Git-Tag: v2.6.33-rc4~69^2 X-Git-Url: http://git.openpandora.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=87d26d2d119953d07fdaa6435f324e8cb2e6f475;p=pandora-kernel.git ARM: S3C64XX: Fix possible clock look in EPLL and MPLL clock chains There is a possibility of a loop happening in the PLL output clock chain on the S3C64XX series. clk_mpll's parent was set to be clk_mout_mpll, but this is fed from clk_fout_epll (which is also clk_mpll). clk_mpll is meant to be the output from the MPLL, and clk_mout_mpll is a seperate clock derived from the mux of clk_mpll and clk_fin_mpll and thus should be considered a seperate clock. Anything using clk_mpll directly really should not be relying on this being the clock that is eventually routed to a peripheral, so remove the loop and ensure that the clocks accurately represent the clock chain in the device. The clk_mpll is not being used outside of the s3c6400-clock.c code, so this change should not break anything else. Do the same for the EPLL. Signed-off-by: Ben Dooks --- Reading git-diff-tree failed