From: Huang Shijie Date: Fri, 7 Sep 2012 02:38:40 +0000 (-0400) Subject: serial: mxs-auart: fix the wrong setting order X-Git-Tag: omap-cleanup-sparseirq-for-v3.7~29 X-Git-Url: http://git.openpandora.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=851b714b29db0e394c293170e714f90a778060ad;p=pandora-kernel.git serial: mxs-auart: fix the wrong setting order After set the AUART_CTRL0_CLKGATE, the UART will gate all the clocks off. So the following line will not take effect. ................................................................ writel(AUART_INTR_RXIEN | AUART_INTR_RTIEN | AUART_INTR_CTSMIEN, u->membase + AUART_INTR_CLR); ................................................................ To fix this issue, the patch moves this gate-off line to the end of setting registers. Signed-off-by: Huang Shijie Signed-off-by: Greg Kroah-Hartman --- Reading git-diff-tree failed