From: Paul Mackerras Date: Wed, 3 Oct 2007 04:41:15 +0000 (+1000) Subject: [POWERPC] Use cache-inhibited large page bit from firmware X-Git-Tag: v2.6.24-rc1~1450^2~44 X-Git-Url: http://git.openpandora.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=84fdde5af1eca5ff170d1dff7e2681b0a50a9ecb;p=pandora-kernel.git [POWERPC] Use cache-inhibited large page bit from firmware Discussions with firmware architects have confirmed that the bit in the ibm,pa-features property that indicates support for cache-inhibited large (>= 64kB) page mappings does in fact mean that the hypervisor allows 64kB mappings to I/O devices. Thus we can now enable the code that tests that bit and sets our CPU_FTR_CI_LARGE_PAGE feature bit. Signed-off-by: Paul Mackerras --- Reading git-diff-tree failed