From: Zhe Wang <zhe1.wang@intel.com>
Date: Thu, 20 Nov 2014 13:42:56 +0000 (+0000)
Subject: drm/i915: Gen9 shadowed registers
X-Git-Tag: omap-for-v3.20/drop-legacy-3517~77^2~14^2~10
X-Git-Url: http://git.openpandora.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=7c859007fdae545b71db7a2d58a9214da5806800;p=pandora-kernel.git

drm/i915: Gen9 shadowed registers

For MMIO registers which are shadowed, force wake is not needed to
write to these registers.

v2: Rebase on top of nightly (Damien)

v3: Rebase on top of "Gen9 multiple-engine forcewake" changes

v4: (Mika, Bob, done by Damien)
- Reorder the shadowed registers by popularity

Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com>
Signed-off-by: Zhe Wang <zhe1.wang@intel.com>
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
---

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