From: Rajendra Nayak <rnayak@ti.com>
Date: Mon, 5 Oct 2009 20:31:44 +0000 (-0700)
Subject: omap: Lock DPLL5 at boot
X-Git-Tag: v2.6.32-rc4~33^2~7
X-Git-Url: http://git.openpandora.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=7a66a39b8599e09c82e2e95fec55f414ad015282;p=pandora-kernel.git

omap: Lock DPLL5 at boot

Lock DPLL5 at 120MHz at boot. The USBHOST 120MHz f-clock and
USBTLL f-clock are the only users of this DPLL, and 120MHz is
is the only recommended rate for these clocks.

With this patch, the 60 MHz ULPI clock is generated correctly.

Tested on an OMAP3430 SDP.

Signed-off-by: Rajendra Nayak <rnayak@ti.com>
Signed-off-by: Anand Gadiyar <gadiyar@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
---

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