From: Chen-Yu Tsai <wens@csie.org>
Date: Wed, 26 Nov 2014 07:16:52 +0000 (+0800)
Subject: clk: sunxi: unify sun6i AHB1 clock with proper PLL6 pre-divider
X-Git-Tag: omap-for-v4.1/prcm-dts-mfd-syscon-fix~17^2~13^2~19^2~16
X-Git-Url: http://git.openpandora.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=7954dfaee386d45d6ec655e5153ad67edf311a56;p=pandora-kernel.git

clk: sunxi: unify sun6i AHB1 clock with proper PLL6 pre-divider

This patch unifies the sun6i AHB1 clock, originally supported
with separate mux and divider clks. It also adds support for
the pre-divider on the PLL6 input, thus allowing the clock to
be muxed to PLL6 with proper clock rate calculation.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
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