From: Junhui Liu <junhui.liu@pigmoral.tech>
Date: Tue, 14 Jan 2025 16:46:39 +0000 (+0800)
Subject: riscv: cpu: k230: Add support for Canaan Kendryte K230 SoC
X-Git-Tag: v2025.04-rc1~53^2~2
X-Git-Url: http://git.openpandora.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=78d9ce3e36a48fff57648e247b53be1949803e48;p=pandora-u-boot.git

riscv: cpu: k230: Add support for Canaan Kendryte K230 SoC

Add Canaan K230 SoC with sysreset support, running without cache
enabled.

Signed-off-by: Junhui Liu <junhui.liu@pigmoral.tech>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
---

diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
index a160d24fb03..faf70cb5d4c 100644
--- a/arch/riscv/Kconfig
+++ b/arch/riscv/Kconfig
@@ -14,6 +14,9 @@ config TARGET_ANDES_AE350
 config TARGET_BANANAPI_F3
 	bool "Support BananaPi F3 Board"
 
+config TARGET_K230_CANMV
+	bool "Support K230 CanMV Board"
+
 config TARGET_LICHEERV_NANO
 	bool "Support LicheeRV Nano Board"
 
@@ -91,6 +94,7 @@ config SPL_ZERO_MEM_BEFORE_USE
 # board-specific options below
 source "board/andestech/ae350/Kconfig"
 source "board/aspeed/ibex_ast2700/Kconfig"
+source "board/canaan/k230_canmv/Kconfig"
 source "board/emulation/qemu-riscv/Kconfig"
 source "board/microchip/mpfs_icicle/Kconfig"
 source "board/openpiton/riscv64/Kconfig"
@@ -113,6 +117,7 @@ source "arch/riscv/cpu/ast2700/Kconfig"
 source "arch/riscv/cpu/generic/Kconfig"
 source "arch/riscv/cpu/jh7110/Kconfig"
 source "arch/riscv/cpu/k1/Kconfig"
+source "arch/riscv/cpu/k230/Kconfig"
 
 # architecture-specific options below
 
diff --git a/arch/riscv/cpu/k230/Kconfig b/arch/riscv/cpu/k230/Kconfig
new file mode 100644
index 00000000000..d76ad92a049
--- /dev/null
+++ b/arch/riscv/cpu/k230/Kconfig
@@ -0,0 +1,14 @@
+# SPDX-License-Identifier: GPL-2.0+
+#
+# Copyright (c) 2025, Junhui Liu <junhui.liu@pigmoral.tech>
+
+config CANAAN_K230
+	bool
+	select ARCH_EARLY_INIT_R
+	select BINMAN
+	imply CPU
+	imply CPU_RISCV
+	imply RISCV_TIMER
+	imply CMD_CPU
+	imply SYSRESET
+	imply SYSRESET_SYSCON
diff --git a/arch/riscv/cpu/k230/Makefile b/arch/riscv/cpu/k230/Makefile
new file mode 100644
index 00000000000..6e321cf3ed1
--- /dev/null
+++ b/arch/riscv/cpu/k230/Makefile
@@ -0,0 +1,6 @@
+# SPDX-License-Identifier: GPL-2.0+
+#
+# Copyright (c) 2025, Junhui Liu <junhui.liu@pigmoral.tech>
+
+obj-y += dram.o
+obj-y += cpu.o
diff --git a/arch/riscv/cpu/k230/cpu.c b/arch/riscv/cpu/k230/cpu.c
new file mode 100644
index 00000000000..417a25f0a8b
--- /dev/null
+++ b/arch/riscv/cpu/k230/cpu.c
@@ -0,0 +1,9 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (c) 2025, Junhui Liu <junhui.liu@pigmoral.tech>
+ */
+
+int cleanup_before_linux(void)
+{
+	return 0;
+}
diff --git a/arch/riscv/cpu/k230/dram.c b/arch/riscv/cpu/k230/dram.c
new file mode 100644
index 00000000000..b2d3e4fd6a9
--- /dev/null
+++ b/arch/riscv/cpu/k230/dram.c
@@ -0,0 +1,21 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2018, Bin Meng <bmeng.cn@gmail.com>
+ */
+
+#include <asm/global_data.h>
+#include <fdtdec.h>
+#include <init.h>
+#include <linux/sizes.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+int dram_init(void)
+{
+	return fdtdec_setup_mem_size_base();
+}
+
+int dram_init_banksize(void)
+{
+	return fdtdec_setup_memory_banksize();
+}