From: Sylwester Nawrocki Date: Fri, 14 Jun 2013 13:44:30 +0000 (-0300) Subject: [media] exynos4-is: Fix FIMC-IS clocks initialization X-Git-Tag: v3.10-rc7~6^2~2 X-Git-Url: http://git.openpandora.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=722a860ecb29aa34ec6f7d7f32b949209e86a2f3;p=pandora-kernel.git [media] exynos4-is: Fix FIMC-IS clocks initialization The ISP clock register content is not preserved over the ISP power domain off/on cycle. Instead of setting the clock frequencies once at probe time the clock rates set up is moved to the runtime_resume handler, which is invoked after the related power domain is already enabled, ensuring the clocks are properly configured when the device is actively used. This fixes the FIMC-IS malfunctions and STREAM ON timeout errors accuring on some boards: [ 59.860000] fimc_is_general_irq_handler:583 ISR_NDONE: 5: 0x800003e8, IS_ERROR_UNKNOWN [ 59.860000] fimc_is_general_irq_handler:586 IS_ERROR_TIME_OUT Signed-off-by: Sylwester Nawrocki Signed-off-by: Kyungmin Park --- Reading git-diff-tree failed