From: ling.ma@intel.com Date: Thu, 25 Jun 2009 02:59:22 +0000 (+0800) Subject: drm/i915: Set SSC frequency for 8xx chips correctly X-Git-Tag: v2.6.31-rc3~25^2~19 X-Git-Url: http://git.openpandora.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=6ff4fd05676bc5b5c930bef25901e489f7843660;p=pandora-kernel.git drm/i915: Set SSC frequency for 8xx chips correctly All 8xx class chips have the 66/48 split, not just 855. Signed-off-by: Ma Ling Reviewed-by: Jesse Barnes Signed-off-by: Eric Anholt --- Reading git-diff-tree failed