From: Bruce Allan <bruce.w.allan@intel.com>
Date: Wed, 5 May 2010 22:00:06 +0000 (+0000)
Subject: e1000e: reset MAC-PHY interconnect on 82577/82578 during Sx->S0
X-Git-Tag: v2.6.35-rc1~473^2~252
X-Git-Url: http://git.openpandora.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=6dfaa76994e5d49a82afb415bbe1362e901b2b95;p=pandora-kernel.git

e1000e: reset MAC-PHY interconnect on 82577/82578 during Sx->S0

During Sx->S0 transitions, the interconnect between the MAC and PHY on
82577/82578 can remain in SMBus mode instead of transitioning to the
PCIe-like mode required during normal operation.  Toggling the LANPHYPC
Value bit essentially resets the interconnect forcing it to the correct
mode.

Signed-off-by: Bruce Allan <bruce.w.allan@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
---

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