From: Boris Ostrovsky <boris.ostrovsky@oracle.com>
Date: Mon, 10 Aug 2015 20:34:36 +0000 (-0400)
Subject: xen/PMU: Intercept PMU-related MSR and APIC accesses
X-Git-Tag: omap-for-v4.3/fixes-rc1~72^2~7
X-Git-Url: http://git.openpandora.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=6b08cd6328c58a2ae190c5ee03a2ffcab5ef828e;p=pandora-kernel.git

xen/PMU: Intercept PMU-related MSR and APIC accesses

Provide interfaces for recognizing accesses to PMU-related MSRs and
LVTPC APIC and process these accesses in Xen PMU code.

(The interrupt handler performs XENPMU_flush right away in the beginning
since no PMU emulation is available. It will be added with a later patch).

Signed-off-by: Boris Ostrovsky <boris.ostrovsky@oracle.com>
Reviewed-by: David Vrabel <david.vrabel@citrix.com>
Signed-off-by: David Vrabel <david.vrabel@citrix.com>
---

diff --git a/arch/x86/xen/apic.c b/arch/x86/xen/apic.c
index d03ebfa89b9f..acda713ab5be 100644
--- a/arch/x86/xen/apic.c
+++ b/arch/x86/xen/apic.c
@@ -7,6 +7,7 @@
 #include <xen/xen.h>
 #include <xen/interface/physdev.h>
 #include "xen-ops.h"
+#include "pmu.h"
 #include "smp.h"
 
 static unsigned int xen_io_apic_read(unsigned apic, unsigned reg)
@@ -72,8 +73,10 @@ static u32 xen_apic_read(u32 reg)
 
 static void xen_apic_write(u32 reg, u32 val)
 {
-	if (reg == APIC_LVTPC)
+	if (reg == APIC_LVTPC) {
+		(void)pmu_apic_update(reg);
 		return;
+	}
 
 	/* Warn to see if there's any stray references */
 	WARN(1,"register: %x, value: %x\n", reg, val);
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