From: Catalin Marinas Date: Tue, 7 Mar 2006 14:42:27 +0000 (+0000) Subject: [ARM] 3352/1: DSB required for the completion of a TLB maintenance operation X-Git-Tag: v2.6.16-rc6~82^2~1 X-Git-Url: http://git.openpandora.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=6a0e243069b09a323255f6e847c87d531961cd96;p=pandora-kernel.git [ARM] 3352/1: DSB required for the completion of a TLB maintenance operation Patch from Catalin Marinas Chapter B2.7.3 in the latest ARM ARM (with v6 information) states that the completion of a TLB maintenance operation is only guaranteed by the execution of a DSB (Data Syncronization Barrier, formerly Data Write Barrier or Drain Write Buffer). Note that a DSB is only needed in the flush_tlb_kernel_* functions since the completion is guaranteed by a mode change (i.e. switching back to user mode) for the flush_tlb_user_* functions. Signed-off-by: Catalin Marinas Signed-off-by: Russell King --- Reading git-diff-tree failed