From: Zhiwu Song <zhiwu.song@csr.com>
Date: Wed, 31 Aug 2011 02:20:34 +0000 (-0700)
Subject: ARM: CSR: add rtc i/o bridge interface for SiRFprimaII
X-Git-Tag: v3.2-rc1~39^2~4
X-Git-Url: http://git.openpandora.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=684f741446f7a3108b4c167faf20214c42b7eeac;p=pandora-kernel.git

ARM: CSR: add rtc i/o bridge interface for SiRFprimaII

The module is a bridge between the RTC clock domain and the CPU interface
clock domain. ARM access the register of SYSRTC, GPSRTC and PWRC through
this module.

Signed-off-by: Zhiwu Song <zhiwu.song@csr.com>
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Reviewed-by: Jamie Iles <jamie@jamieiles.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
---

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