From: Sujith Manoharan <c_manoha@qca.qualcomm.com>
Date: Mon, 9 Mar 2015 08:50:08 +0000 (+0530)
Subject: ath9k: Initialize pll_pwrsave for AR9462/AR9565
X-Git-Tag: omap-for-v4.1/fixes-rc1~141^2~95^2~96
X-Git-Url: http://git.openpandora.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=656cd75c387383fe3a63e21204107abf5515ecfc;p=pandora-kernel.git

ath9k: Initialize pll_pwrsave for AR9462/AR9565

Cards based on AR9462/AR9565 support more PCIE
power save mechanisms, so register them correctly.

Signed-off-by: Sujith Manoharan <c_manoha@qca.qualcomm.com>
Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
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