From: Chen-Yu Tsai Date: Tue, 4 Feb 2025 17:29:53 +0000 (+0800) Subject: rockchip: rk3399: grf: Fix enum typos for UART2 X-Git-Tag: v2025.04-rc3~6^2~9 X-Git-Url: http://git.openpandora.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=64cec76899a9a32c2434a324cd400492e4f5a59d;p=pandora-u-boot.git rockchip: rk3399: grf: Fix enum typos for UART2 In the GRF header file, some instances of UART2 pinmux are prefixed with "GRF_UART2DBG" while others have "GRF_UART2DGB". Since UART2 is the default console UART and used for debugging, it is more likely the name should be UART2DBG. Fix the ones that are wrong. Fixes: a2c08df3813b ("pinctrl: add driver for rk3399") Fixes: fa72de10452c ("rockchip: arm64: rk3399: move grf register definitions to grf_rk3399.h") Signed-off-by: Chen-Yu Tsai Reviewed-by: Quentin Schulz Reviewed-by: Paul Kocialkowski Reviewed-by: Kever Yang --- diff --git a/arch/arm/include/asm/arch-rockchip/grf_rk3399.h b/arch/arm/include/asm/arch-rockchip/grf_rk3399.h index dd89cd20505..e6125d6bf54 100644 --- a/arch/arm/include/asm/arch-rockchip/grf_rk3399.h +++ b/arch/arm/include/asm/arch-rockchip/grf_rk3399.h @@ -466,18 +466,18 @@ enum { /* GRF_GPIO4C_IOMUX */ GRF_GPIO4C0_SEL_SHIFT = 0, GRF_GPIO4C0_SEL_MASK = 3 << GRF_GPIO4C0_SEL_SHIFT, - GRF_UART2DGBB_SIN = 2, + GRF_UART2DBGB_SIN = 2, GRF_HDMII2C_SCL = 3, GRF_GPIO4C1_SEL_SHIFT = 2, GRF_GPIO4C1_SEL_MASK = 3 << GRF_GPIO4C1_SEL_SHIFT, - GRF_UART2DGBB_SOUT = 2, + GRF_UART2DBGB_SOUT = 2, GRF_HDMII2C_SDA = 3, GRF_GPIO4C2_SEL_SHIFT = 4, GRF_GPIO4C2_SEL_MASK = 3 << GRF_GPIO4C2_SEL_SHIFT, GRF_PWM_0 = 1, GRF_GPIO4C3_SEL_SHIFT = 6, GRF_GPIO4C3_SEL_MASK = 3 << GRF_GPIO4C3_SEL_SHIFT, - GRF_UART2DGBC_SIN = 1, + GRF_UART2DBGC_SIN = 1, GRF_GPIO4C4_SEL_SHIFT = 8, GRF_GPIO4C4_SEL_MASK = 3 << GRF_GPIO4C4_SEL_SHIFT, GRF_UART2DBGC_SOUT = 1, diff --git a/arch/arm/mach-rockchip/rk3399/rk3399.c b/arch/arm/mach-rockchip/rk3399/rk3399.c index 0c28241c603..99597076d2c 100644 --- a/arch/arm/mach-rockchip/rk3399/rk3399.c +++ b/arch/arm/mach-rockchip/rk3399/rk3399.c @@ -157,7 +157,7 @@ void board_debug_uart_init(void) /* Enable early UART2 channel C on the RK3399 */ rk_clrsetreg(&grf->gpio4c_iomux, GRF_GPIO4C3_SEL_MASK, - GRF_UART2DGBC_SIN << GRF_GPIO4C3_SEL_SHIFT); + GRF_UART2DBGC_SIN << GRF_GPIO4C3_SEL_SHIFT); rk_clrsetreg(&grf->gpio4c_iomux, GRF_GPIO4C4_SEL_MASK, GRF_UART2DBGC_SOUT << GRF_GPIO4C4_SEL_SHIFT);