From: Jason McMullan <jason.mcmullan@gmail.com>
Date: Wed, 5 May 2010 17:59:37 +0000 (+0100)
Subject: ARM: 6094/1: Extend cache-l2x0 to support the 16-way PL310
X-Git-Tag: v2.6.35-rc1~503^2~4^5~5
X-Git-Url: http://git.openpandora.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=64039be8226b9f6c80c704d94ac9891eee4a274c;p=pandora-kernel.git

ARM: 6094/1: Extend cache-l2x0 to support the 16-way PL310

The L310 cache controller's interface is almost identical
to the L210. One major difference is that the PL310 can
have up to 16 ways.

This change uses the cache's part ID and the Associativity
bits in the AUX_CTRL register to determine the number of ways.

Also, this version prints out the CACHE_ID and AUX_CTRL registers.

Acked-by: Will Deacon <will.deacon@arm.com>
Acked-by: Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Jason S. McMullan <jason.mcmullan@netronome.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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