From: Chen-Yu Tsai <wens@csie.org>
Date: Sat, 17 Jan 2015 05:19:26 +0000 (+0800)
Subject: clk: sunxi: Add mod0 and mmc module clock support for A80
X-Git-Tag: omap-for-v4.1/prcm-dts-mfd-syscon-fix~17^2~13^2~19^2~3
X-Git-Url: http://git.openpandora.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=61af4d8dceeb179b62cb342f4008ce3774d3d1fd;p=pandora-kernel.git

clk: sunxi: Add mod0 and mmc module clock support for A80

The module 0 style clocks, or storage module clocks as named in the
official SDK, are almost the same as the module 0 clocks on earlier
Allwinner SoCs. The only difference is wider mux register bits.

As with earlier Allwinner SoCs, mmc module clocks are a special case
of mod0 clocks, with phase controls for 2 child clocks, output and
sample.

This patch adds support for both.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
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