From: Liu Ying <Ying.Liu@freescale.com>
Date: Thu, 12 Feb 2015 06:01:29 +0000 (+0800)
Subject: ARM: imx6q: clk: Add support for mipi_core_cfg clock as a shared clock gate
X-Git-Tag: omap-for-v4.2/o2_dc~54^2~3^2~5
X-Git-Url: http://git.openpandora.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=5ccc248cc53708337a2bfe4ea380c20948e8bbed;p=pandora-kernel.git

ARM: imx6q: clk: Add support for mipi_core_cfg clock as a shared clock gate

The CG8 field of the CCM CCGR3 register is named as 'mipi_core_cfg' clock,
according to the i.MX6q/sdl reference manuals.  This clock is actually the
gate for several clocks, including the hsi_tx_sel clock's output and the
video_27m clock's output.  The MIPI DSI host controller embedded in the
i.MX6q/sdl SoCs uses the video_27m clock to generate PLL reference clock and
MIPI core configuration clock.  In order to gate/ungate the two MIPI DSI
host controller relevant clocks, this patch adds the mipi_core_cfg clock as
a shared clock gate.

Suggested-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
---

Reading git-diff-tree failed