From: Paulo Zanoni <paulo.r.zanoni@intel.com>
Date: Tue, 1 Apr 2014 18:37:11 +0000 (-0300)
Subject: drm/i915: use GEN8_IRQ_INIT on GEN5
X-Git-Tag: omap-for-v3.16/fixes-against-rc1~44^2~63^2~84
X-Git-Url: http://git.openpandora.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=5c50244253937479481ed87ff58863d7c3e91ee3;p=pandora-kernel.git

drm/i915: use GEN8_IRQ_INIT on GEN5

And rename it to GEN5_IRQ_INIT.

We have discussed doing equivalent changes on July 2013, and I even
sent a patch series for this: "[PATCH 00/15] Unify interrupt register
init/reset". Now that the BDW code was merged, I have one more
argument in favor of these changes.

Here's what really changes with the Gen 5 IRQ init code:
  - We now clear the IIR registers at preinstall (they are also
    cleared at postinstall, but we will change that later).
  - We have an additional POSTING_READ at the IMR register.

v2: - Fix typo in commit message.
    - Add POSTING_READ calls to the macros (Ben, Daniel, Jani).

Reviewed-by: Ben Widawsky <ben@bwidawsk.net> (v1)
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
---

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