From: Chanwoo Choi <cw00.choi@samsung.com>
Date: Mon, 2 Feb 2015 14:24:04 +0000 (+0900)
Subject: clk: samsung: exynos5433: Add clocks for CMU_BUS{0|1|2} domains
X-Git-Tag: omap-for-v4.2/o2_dc~66^2~36^2~13
X-Git-Url: http://git.openpandora.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=5785d6e61f27f7af4d239c1647d5a22e0dbff19b;p=pandora-kernel.git

clk: samsung: exynos5433: Add clocks for CMU_BUS{0|1|2} domains

This patch adds the mux/divider/gate clocks for CMU_BUS{0|1|2} domains
which contain global data buses clocked at up the 400MHz. These blocks
transfer data between DRAM and various sub-blocks. These clock domains
also contain global peripheral buses clocked at 67/111/200/222/266/333/400
MHz and used for register accesses.

Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
Acked-by: Inki Dae <inki.dae@samsung.com>
Reviewed-by: Pankaj Dubey <pankaj.dubey@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
---

Reading git-diff-tree failed