From: Ville Syrjälä <ville.syrjala@linux.intel.com>
Date: Fri, 25 Jan 2013 19:44:45 +0000 (+0200)
Subject: drm/i915: Include display_mmio_offset in sequencer index/data registers
X-Git-Tag: v3.9-rc1~83^2~36^2~30
X-Git-Url: http://git.openpandora.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=56a12a509296c87d6f149be86c6694d312b21d35;p=pandora-kernel.git

drm/i915: Include display_mmio_offset in sequencer index/data registers

SR01 needs to be touched to disable VGA on non-UMS setups too.
So the sequencer registers need to include the appripriate offset
on VLV.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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