From: Jeff McGee <jeff.mcgee@intel.com>
Date: Fri, 27 Feb 2015 18:22:32 +0000 (-0800)
Subject: drm/i915/chv: Add CHV HW status to SSEU status
X-Git-Tag: omap-for-v4.1/fixes-rc1~82^2~24^2~53
X-Git-Url: http://git.openpandora.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=5575f03a603d267e84ab3727f7241b8be5f7d8ee;p=pandora-kernel.git

drm/i915/chv: Add CHV HW status to SSEU status

Collect the currently enabled counts of slice, subslice, and
execution units using the power gate control ack message
registers specific to Cherryview.

Slice/subslice/EU info and hardware status can now be
determined for CHV, so allow the debugfs SSEU status dump
to proceed for CHV devices.

Signed-off-by: Jeff McGee <jeff.mcgee@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
---

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