From: Linus Walleij <linus.walleij@stericsson.com>
Date: Sat, 21 Aug 2010 09:07:36 +0000 (+0200)
Subject: spi/pl022: fix APB pclk power regression on U300
X-Git-Tag: v2.6.36-rc5~44^2~2
X-Git-Url: http://git.openpandora.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=545074fb953e1753f6b8409db533ad7998789efb;p=pandora-kernel.git

spi/pl022: fix APB pclk power regression on U300

With the introduction of an AMBA PrimeCell per-cell block clock,
the pclk was left on after probe() unless explicitly disabled.
This clock is wired to the same clock on PL022 causing it to stay
always on since.

Fix this up properly by clocking the pclk whenever we want to
write into any PL022 registers and clocking the external clock
whenever we want to transmit messages on the bus.

Signed-off-by: Linus Walleij <linus.walleij@stericsson.com>
Tested-by : Kevin Wells <wellsk40@gmail.com>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
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