From: Tudor Laurentiu <b10716@freescale.com>
Date: Tue, 19 Aug 2014 11:25:03 +0000 (+0300)
Subject: powerpc/fsl_msi: change the irq handler from chained to normal
X-Git-Tag: fixes-against-v3.18-rc2~117^2~22^2~16
X-Git-Url: http://git.openpandora.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=543c043cbae7;p=pandora-kernel.git

powerpc/fsl_msi: change the irq handler from chained to normal

As we do for other fsl-mpic related cascaded irqchips
(e.g. error ints, mpic timers), use a normal irq handler
for msi irqs too.
This brings some advantages such as mask/unmask/ack/eoi
and irq state taken care behind the scenes, kstats
updates a.s.o plus access to features provided by mpic,
such as affinity.

Signed-off-by: Laurentiu Tudor <Laurentiu.Tudor@freescale.com>
Cc: Scott Wood <scottwood@freescale.com>
Cc: Mihai Caraman <mihai.caraman@freescale.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
---

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