From: Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
Date: Wed, 13 Feb 2013 21:20:21 +0000 (+0100)
Subject: drm/i915: Set i9xx lvds clock limits according to specifications
X-Git-Tag: v3.9-rc1~83^2~11^2~8
X-Git-Url: http://git.openpandora.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=53a7d2d15ef45fb892defaf624ad6db7d528d8ac;p=pandora-kernel.git

drm/i915: Set i9xx lvds clock limits according to specifications

The Intel PRM says the M1 and M2 divisors must be in the range of 10-20 and 5-9.
Since we do all calculations based on them being register values (which are
subtracted by 2) we need to specify them accordingly.

Signed-off-by: Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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