From: Thomas Abraham Date: Sat, 14 Jul 2012 01:53:08 +0000 (+0900) Subject: ARM: EXYNOS: Fix the incorrect hierarchy of spi controller bus clock X-Git-Tag: v3.6-rc1~143^2~1^2~5 X-Git-Url: http://git.openpandora.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=46fda15c0c21493a9305db0a05e08f072d6409e4;p=pandora-kernel.git ARM: EXYNOS: Fix the incorrect hierarchy of spi controller bus clock The sclk_spi clock is derived currently from the first level divider (MMCx_RATIO) which is incorrect. The output of the first level clock is divided by a second level divider (MMCx_PRE_RATIO), the output of which is used as the spi bus clock (sclk_spi). Fix the clock hierarchy issues for the sclk_spi clock. Signed-off-by: Thomas Abraham Acked-by: Jaswinder Singh [kgene.kim@samsung.com: changed the name of clk for consensus] Signed-off-by: Kukjin Kim --- Reading git-diff-tree failed