From: Jesse Barnes <jbarnes@virtuousgeek.org>
Date: Thu, 28 Mar 2013 16:55:41 +0000 (-0700)
Subject: drm/i915: panel power sequencing for VLV eDP v2
X-Git-Tag: omap-for-v3.10/dt-fixes-for-merge-window~55^2~51^2~19
X-Git-Url: http://git.openpandora.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=453c542059cfa1988cabcf84f715307cd9789163;p=pandora-kernel.git

drm/i915: panel power sequencing for VLV eDP v2

PPS register offsets have changed in Valleyview.

v2: don't clobber port select bits on VLV when fixing up PPS timings
    don't bother with G4x PPS regs (Jani)

Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Gajanan Bhat <gajanan.bhat@intel.com>
Signed-off-by: Vijay Purushothaman <vijay.a.purushothaman@intel.com>
Signed-off-by: Ben Widawsky <benjamin.widawsky@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
---

Reading git-diff-tree failed