From: Mauro Carvalho Chehab Date: Tue, 23 Jun 2009 01:48:29 +0000 (-0300) Subject: i7core_edac: Add a memory check routine, based on device 3 function 4 X-Git-Tag: v2.6.35-rc2~10^2~75 X-Git-Url: http://git.openpandora.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=442305b152778f07504e9fdf64815d4841279bbe;p=pandora-kernel.git i7core_edac: Add a memory check routine, based on device 3 function 4 This function appears only on Xeon 5500 datasheet. Yet, testing with a Xeon 3503 showed that this is also implemented on other Nehalem processors. At the first read, MC_TEST_ERR_RCV1 and MC_TEST_ERR_RCV0 can contain any value. Modify CE error logic to update the error count only after the second read. An alternative approach would be to do a write at rcv0 and rcv1 registers, but it seemed better to keep they untouched, since BIOS might eventually assume that they are exclusive for their usage. Signed-off-by: Mauro Carvalho Chehab --- Reading git-diff-tree failed