From: Andi Kleen Date: Tue, 4 Nov 2014 01:00:27 +0000 (-0800) Subject: perf/x86/intel/uncore: Fix IRP uncore register offsets on Haswell EP X-Git-Tag: omap-for-v3.19/fixes-for-merge-window~95^2~1 X-Git-Url: http://git.openpandora.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=41a134a5830a5e1396723ace0a63000780d6e267;p=pandora-kernel.git perf/x86/intel/uncore: Fix IRP uncore register offsets on Haswell EP The counter register offsets for the IRP box PMU for Haswell-EP were incorrect. The offsets actually changed over IvyBridge EP. Fix them to the correct values. For this we need to fork the read function from the IVB and use an own counter array. Tested-by: patrick.lu@intel.com Signed-off-by: Andi Kleen Signed-off-by: Peter Zijlstra (Intel) Cc: Arnaldo Carvalho de Melo Link: http://lkml.kernel.org/r/1415062828-19759-3-git-send-email-andi@firstfloor.org Signed-off-by: Ingo Molnar --- Reading git-diff-tree failed