From: Qipan Li <Qipan.Li@csr.com>
Date: Sun, 4 May 2014 06:32:36 +0000 (+0800)
Subject: spi: sirf: decrease the interrupt count and latency of PIO mode
X-Git-Tag: omap-for-v3.16/fixes-against-rc1~39^2~29^2~1^5
X-Git-Url: http://git.openpandora.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=41148c3a728222a885bc2f3ba3ce66831de0b244;p=pandora-kernel.git

spi: sirf: decrease the interrupt count and latency of PIO mode

current PIO tranfer method be described as follows:
1. fill as much as bytes but no more than 256 bytes(fifo size)
2. enable oflow/uflow/txfifo_empty interrupt
3. isr process 3 interrupt signal, do complete works.
4. after isr done, if there are left bytes go into 1 else go into 5
5. transfer end

by current PIO transfer method:
1. reduce interrupt counts in spi interrupt line.
2. reduce interrupt latency because no do data fill/fetch in isr.

Signed-off-by: Qipan Li <Qipan.Li@csr.com>
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
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