From: Marek Vasut Date: Tue, 25 Mar 2025 22:43:32 +0000 (+0100) Subject: ram: renesas: dbsc5: Factor out dbsc5_wait_dbwait() X-Git-Tag: v2025.07-rc1~18^2~10^2~1 X-Git-Url: http://git.openpandora.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=401c268e1d295983eb4830f539bf2ad04dfaa2ad;p=pandora-u-boot.git ram: renesas: dbsc5: Factor out dbsc5_wait_dbwait() Extract wait for completion code from dbsc5_send_dbcmd2() into new separate function dbsc5_wait_dbwait(). This extracted code can be used to implement MR register read in the future. Signed-off-by: Marek Vasut --- diff --git a/drivers/ram/renesas/dbsc5/dram.c b/drivers/ram/renesas/dbsc5/dram.c index 461c862ea27..ce04dd58180 100644 --- a/drivers/ram/renesas/dbsc5/dram.c +++ b/drivers/ram/renesas/dbsc5/dram.c @@ -1740,6 +1740,34 @@ static void dbsc5_reg_write(void __iomem *addr, u32 data) writel(data, addr + 0x8000); } +/** + * dbsc5_wait_dbwait() - DRAM Command Wait Access Completion + * @dev: DBSC5 device + * + * Wait for DRAM access completion. This is used before sending a command + * to the DRAM to assure no other command is in flight already, or while + * waiting for MRR command to complete. + */ +static void dbsc5_wait_dbwait(struct udevice *dev) +{ + struct renesas_dbsc5_dram_priv *priv = dev_get_priv(dev); + void __iomem *regs_dbsc_d = priv->regs + DBSC5_DBSC_D_OFFSET; + u32 val; + int ret; + + ret = readl_poll_timeout(regs_dbsc_d + DBSC_DBWAIT, val, ((val & BIT(0)) == 0), 1000000); + if (ret < 0) { + printf("%s DBWAIT bit 0 timeout\n", __func__); + hang(); + } + + ret = readl_poll_timeout(regs_dbsc_d + DBSC_DBWAIT + 0x4000, val, ((val & BIT(0)) == 0), 1000000); + if (ret < 0) { + printf("%s DBWAIT + 0x4000 bit 0 timeout\n", __func__); + hang(); + } +} + /** * dbsc5_send_dbcmd2() - DRAM Command Write Access * @dev: DBSC5 device @@ -1759,23 +1787,11 @@ static void dbsc5_send_dbcmd2(struct udevice *dev, const u8 opcode, const u32 cmd = (opcode << 24) | (channel << 20) | (rank << 16) | arg; struct renesas_dbsc5_dram_priv *priv = dev_get_priv(dev); void __iomem *regs_dbsc_d = priv->regs + DBSC5_DBSC_D_OFFSET; - u32 val; - int ret; /* dummy read */ readl(regs_dbsc_d + DBSC_DBCMD); - ret = readl_poll_timeout(regs_dbsc_d + DBSC_DBWAIT, val, ((val & BIT(0)) == 0), 1000000); - if (ret < 0) { - printf("%s DBWAIT bit 0 timeout\n", __func__); - hang(); - } - - ret = readl_poll_timeout(regs_dbsc_d + DBSC_DBWAIT + 0x4000, val, ((val & BIT(0)) == 0), 1000000); - if (ret < 0) { - printf("%s DBWAIT + 0x4000 bit 0 timeout\n", __func__); - hang(); - } + dbsc5_wait_dbwait(dev); dbsc5_reg_write(regs_dbsc_d + DBSC_DBCMD, cmd); }