From: Michael Neuling <mikey@neuling.org>
Date: Thu, 25 Apr 2013 15:30:57 +0000 (+0000)
Subject: powerpc: Fix hardware IRQs with MMU on exceptions when HV=0
X-Git-Tag: omap-for-v3.10/dt-fixes-for-merge-window~66^2~62
X-Git-Url: http://git.openpandora.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=3e96ca7f007ddb06b82a74a68585d1dbafa85ff1;p=pandora-kernel.git

powerpc: Fix hardware IRQs with MMU on exceptions when HV=0

POWER8 allows us to take interrupts with the MMU on.  This gives us a
second set of vectors offset at 0x4000.

Unfortunately when coping these vectors we missed checking for MSR HV
for hardware interrupts (0x500).  This results in us trying to use
HSRR0/1 when HV=0, rather than SRR0/1 on HW IRQs

The below fixes this to check CPU_FTR_HVMODE when patching the code at
0x4500.

Also we remove the check for CPU_FTR_ARCH_206 since relocation on IRQs
are only available in arch 2.07 and beyond.

Thanks to benh for helping find this.

Signed-off-by: Michael Neuling <mikey@neuling.org>
CC: <stable@vger.kernel.org>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
---

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