From: Enric Balletbo i Serra Date: Wed, 25 May 2011 11:57:46 +0000 (+0200) Subject: OMAP3: Move secure_unlock() function to not duplicate code X-Git-Tag: v1.5.1~3 X-Git-Url: http://git.openpandora.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=3dadf2d15c0e8744e4864b36c88c5f740594d4de;p=pandora-x-loader.git OMAP3: Move secure_unlock() function to not duplicate code The secure_unlock() function is implemented by various boards, this patch moves this function to a common place to not duplicate code. board/omap3530beagle/omap3530beagle.c :527:void secure_unlock(void) board/igep00x0/igep00x0.c :271:void secure_unlock(void) board/omap3430sdp/omap3430sdp.c :314:void secure_unlock(void) board/omap3evm/omap3evm.c :359:void secure_unlock(void) board/omap3430labrador/omap3430sdp.c :316:void secure_unlock(void) board/overo/overo.c :478:void secure_unlock(void) Signed-off-by: Enric Balletbo i Serra Signed-off-by: Anand Gadiyar --- diff --git a/board/igep00x0/igep00x0.c b/board/igep00x0/igep00x0.c index a9c02dd..8c99923 100644 --- a/board/igep00x0/igep00x0.c +++ b/board/igep00x0/igep00x0.c @@ -263,40 +263,6 @@ void prcm_init(void) delay(5000); } -/***************************************** - * Routine: secure_unlock - * Description: Setup security registers for access - * (GP Device only) - *****************************************/ -void secure_unlock(void) -{ - /* Permission values for registers -Full fledged permissions to all */ -#define UNLOCK_1 0xFFFFFFFF -#define UNLOCK_2 0x00000000 -#define UNLOCK_3 0x0000FFFF - /* Protection Module Register Target APE (PM_RT) */ - __raw_writel(UNLOCK_1, RT_REQ_INFO_PERMISSION_1); - __raw_writel(UNLOCK_1, RT_READ_PERMISSION_0); - __raw_writel(UNLOCK_1, RT_WRITE_PERMISSION_0); - __raw_writel(UNLOCK_2, RT_ADDR_MATCH_1); - - __raw_writel(UNLOCK_3, GPMC_REQ_INFO_PERMISSION_0); - __raw_writel(UNLOCK_3, GPMC_READ_PERMISSION_0); - __raw_writel(UNLOCK_3, GPMC_WRITE_PERMISSION_0); - - __raw_writel(UNLOCK_3, OCM_REQ_INFO_PERMISSION_0); - __raw_writel(UNLOCK_3, OCM_READ_PERMISSION_0); - __raw_writel(UNLOCK_3, OCM_WRITE_PERMISSION_0); - __raw_writel(UNLOCK_2, OCM_ADDR_MATCH_2); - - /* IVA Changes */ - __raw_writel(UNLOCK_3, IVA2_REQ_INFO_PERMISSION_0); - __raw_writel(UNLOCK_3, IVA2_READ_PERMISSION_0); - __raw_writel(UNLOCK_3, IVA2_WRITE_PERMISSION_0); - - __raw_writel(UNLOCK_1, SMS_RG_ATT0); /* SDRC region 0 public */ -} - /********************************************************** * Routine: try_unlock_sram() * Description: If chip is GP type, unlock the SRAM for diff --git a/board/omap3430labrador/omap3430sdp.c b/board/omap3430labrador/omap3430sdp.c index 991a34f..2c42168 100644 --- a/board/omap3430labrador/omap3430sdp.c +++ b/board/omap3430labrador/omap3430sdp.c @@ -308,40 +308,6 @@ void prcm_init(void) delay(5000); } -/***************************************** - * Routine: secure_unlock - * Description: Setup security registers for access - * (GP Device only) - *****************************************/ -void secure_unlock(void) -{ - /* Permission values for registers -Full fledged permissions to all */ - #define UNLOCK_1 0xFFFFFFFF - #define UNLOCK_2 0x00000000 - #define UNLOCK_3 0x0000FFFF - /* Protection Module Register Target APE (PM_RT)*/ - __raw_writel(UNLOCK_1, RT_REQ_INFO_PERMISSION_1); - __raw_writel(UNLOCK_1, RT_READ_PERMISSION_0); - __raw_writel(UNLOCK_1, RT_WRITE_PERMISSION_0); - __raw_writel(UNLOCK_2, RT_ADDR_MATCH_1); - - __raw_writel(UNLOCK_3, GPMC_REQ_INFO_PERMISSION_0); - __raw_writel(UNLOCK_3, GPMC_READ_PERMISSION_0); - __raw_writel(UNLOCK_3, GPMC_WRITE_PERMISSION_0); - - __raw_writel(UNLOCK_3, OCM_REQ_INFO_PERMISSION_0); - __raw_writel(UNLOCK_3, OCM_READ_PERMISSION_0); - __raw_writel(UNLOCK_3, OCM_WRITE_PERMISSION_0); - __raw_writel(UNLOCK_2, OCM_ADDR_MATCH_2); - - /* IVA Changes */ - __raw_writel(UNLOCK_3, IVA2_REQ_INFO_PERMISSION_0); - __raw_writel(UNLOCK_3, IVA2_READ_PERMISSION_0); - __raw_writel(UNLOCK_3, IVA2_WRITE_PERMISSION_0); - - __raw_writel(UNLOCK_1, SMS_RG_ATT0); /* SDRC region 0 public */ -} - /********************************************************** * Routine: try_unlock_sram() * Description: If chip is GP type, unlock the SRAM for diff --git a/board/omap3430sdp/omap3430sdp.c b/board/omap3430sdp/omap3430sdp.c index 859ce1e..fe3f8e1 100644 --- a/board/omap3430sdp/omap3430sdp.c +++ b/board/omap3430sdp/omap3430sdp.c @@ -306,40 +306,6 @@ void prcm_init(void) delay(5000); } -/***************************************** - * Routine: secure_unlock - * Description: Setup security registers for access - * (GP Device only) - *****************************************/ -void secure_unlock(void) -{ - /* Permission values for registers -Full fledged permissions to all */ - #define UNLOCK_1 0xFFFFFFFF - #define UNLOCK_2 0x00000000 - #define UNLOCK_3 0x0000FFFF - /* Protection Module Register Target APE (PM_RT)*/ - __raw_writel(UNLOCK_1, RT_REQ_INFO_PERMISSION_1); - __raw_writel(UNLOCK_1, RT_READ_PERMISSION_0); - __raw_writel(UNLOCK_1, RT_WRITE_PERMISSION_0); - __raw_writel(UNLOCK_2, RT_ADDR_MATCH_1); - - __raw_writel(UNLOCK_3, GPMC_REQ_INFO_PERMISSION_0); - __raw_writel(UNLOCK_3, GPMC_READ_PERMISSION_0); - __raw_writel(UNLOCK_3, GPMC_WRITE_PERMISSION_0); - - __raw_writel(UNLOCK_3, OCM_REQ_INFO_PERMISSION_0); - __raw_writel(UNLOCK_3, OCM_READ_PERMISSION_0); - __raw_writel(UNLOCK_3, OCM_WRITE_PERMISSION_0); - __raw_writel(UNLOCK_2, OCM_ADDR_MATCH_2); - - /* IVA Changes */ - __raw_writel(UNLOCK_3, IVA2_REQ_INFO_PERMISSION_0); - __raw_writel(UNLOCK_3, IVA2_READ_PERMISSION_0); - __raw_writel(UNLOCK_3, IVA2_WRITE_PERMISSION_0); - - __raw_writel(UNLOCK_1, SMS_RG_ATT0); /* SDRC region 0 public */ -} - /********************************************************** * Routine: try_unlock_sram() * Description: If chip is GP type, unlock the SRAM for diff --git a/board/omap3530beagle/omap3530beagle.c b/board/omap3530beagle/omap3530beagle.c index e3105bd..c861b21 100644 --- a/board/omap3530beagle/omap3530beagle.c +++ b/board/omap3530beagle/omap3530beagle.c @@ -519,40 +519,6 @@ void prcm_init(void) delay(5000); } -/***************************************** - * Routine: secure_unlock - * Description: Setup security registers for access - * (GP Device only) - *****************************************/ -void secure_unlock(void) -{ - /* Permission values for registers -Full fledged permissions to all */ -#define UNLOCK_1 0xFFFFFFFF -#define UNLOCK_2 0x00000000 -#define UNLOCK_3 0x0000FFFF - /* Protection Module Register Target APE (PM_RT) */ - __raw_writel(UNLOCK_1, RT_REQ_INFO_PERMISSION_1); - __raw_writel(UNLOCK_1, RT_READ_PERMISSION_0); - __raw_writel(UNLOCK_1, RT_WRITE_PERMISSION_0); - __raw_writel(UNLOCK_2, RT_ADDR_MATCH_1); - - __raw_writel(UNLOCK_3, GPMC_REQ_INFO_PERMISSION_0); - __raw_writel(UNLOCK_3, GPMC_READ_PERMISSION_0); - __raw_writel(UNLOCK_3, GPMC_WRITE_PERMISSION_0); - - __raw_writel(UNLOCK_3, OCM_REQ_INFO_PERMISSION_0); - __raw_writel(UNLOCK_3, OCM_READ_PERMISSION_0); - __raw_writel(UNLOCK_3, OCM_WRITE_PERMISSION_0); - __raw_writel(UNLOCK_2, OCM_ADDR_MATCH_2); - - /* IVA Changes */ - __raw_writel(UNLOCK_3, IVA2_REQ_INFO_PERMISSION_0); - __raw_writel(UNLOCK_3, IVA2_READ_PERMISSION_0); - __raw_writel(UNLOCK_3, IVA2_WRITE_PERMISSION_0); - - __raw_writel(UNLOCK_1, SMS_RG_ATT0); /* SDRC region 0 public */ -} - /********************************************************** * Routine: try_unlock_sram() * Description: If chip is GP type, unlock the SRAM for diff --git a/board/omap3evm/omap3evm.c b/board/omap3evm/omap3evm.c index 2180594..164c211 100644 --- a/board/omap3evm/omap3evm.c +++ b/board/omap3evm/omap3evm.c @@ -351,40 +351,6 @@ void prcm_init(void) delay(5000); } -/***************************************** - * Routine: secure_unlock - * Description: Setup security registers for access - * (GP Device only) - *****************************************/ -void secure_unlock(void) -{ - /* Permission values for registers -Full fledged permissions to all */ - #define UNLOCK_1 0xFFFFFFFF - #define UNLOCK_2 0x00000000 - #define UNLOCK_3 0x0000FFFF - /* Protection Module Register Target APE (PM_RT)*/ - __raw_writel(UNLOCK_1, RT_REQ_INFO_PERMISSION_1); - __raw_writel(UNLOCK_1, RT_READ_PERMISSION_0); - __raw_writel(UNLOCK_1, RT_WRITE_PERMISSION_0); - __raw_writel(UNLOCK_2, RT_ADDR_MATCH_1); - - __raw_writel(UNLOCK_3, GPMC_REQ_INFO_PERMISSION_0); - __raw_writel(UNLOCK_3, GPMC_READ_PERMISSION_0); - __raw_writel(UNLOCK_3, GPMC_WRITE_PERMISSION_0); - - __raw_writel(UNLOCK_3, OCM_REQ_INFO_PERMISSION_0); - __raw_writel(UNLOCK_3, OCM_READ_PERMISSION_0); - __raw_writel(UNLOCK_3, OCM_WRITE_PERMISSION_0); - __raw_writel(UNLOCK_2, OCM_ADDR_MATCH_2); - - /* IVA Changes */ - __raw_writel(UNLOCK_3, IVA2_REQ_INFO_PERMISSION_0); - __raw_writel(UNLOCK_3, IVA2_READ_PERMISSION_0); - __raw_writel(UNLOCK_3, IVA2_WRITE_PERMISSION_0); - - __raw_writel(UNLOCK_1, SMS_RG_ATT0); /* SDRC region 0 public */ -} - /********************************************************** * Routine: try_unlock_sram() * Description: If chip is GP type, unlock the SRAM for diff --git a/board/overo/overo.c b/board/overo/overo.c index d852986..1c8102b 100644 --- a/board/overo/overo.c +++ b/board/overo/overo.c @@ -470,40 +470,6 @@ void prcm_init(void) delay(5000); } -/***************************************** - * Routine: secure_unlock - * Description: Setup security registers for access - * (GP Device only) - *****************************************/ -void secure_unlock(void) -{ - /* Permission values for registers -Full fledged permissions to all */ - #define UNLOCK_1 0xFFFFFFFF - #define UNLOCK_2 0x00000000 - #define UNLOCK_3 0x0000FFFF - /* Protection Module Register Target APE (PM_RT)*/ - __raw_writel(UNLOCK_1, RT_REQ_INFO_PERMISSION_1); - __raw_writel(UNLOCK_1, RT_READ_PERMISSION_0); - __raw_writel(UNLOCK_1, RT_WRITE_PERMISSION_0); - __raw_writel(UNLOCK_2, RT_ADDR_MATCH_1); - - __raw_writel(UNLOCK_3, GPMC_REQ_INFO_PERMISSION_0); - __raw_writel(UNLOCK_3, GPMC_READ_PERMISSION_0); - __raw_writel(UNLOCK_3, GPMC_WRITE_PERMISSION_0); - - __raw_writel(UNLOCK_3, OCM_REQ_INFO_PERMISSION_0); - __raw_writel(UNLOCK_3, OCM_READ_PERMISSION_0); - __raw_writel(UNLOCK_3, OCM_WRITE_PERMISSION_0); - __raw_writel(UNLOCK_2, OCM_ADDR_MATCH_2); - - /* IVA Changes */ - __raw_writel(UNLOCK_3, IVA2_REQ_INFO_PERMISSION_0); - __raw_writel(UNLOCK_3, IVA2_READ_PERMISSION_0); - __raw_writel(UNLOCK_3, IVA2_WRITE_PERMISSION_0); - - __raw_writel(UNLOCK_1, SMS_RG_ATT0); /* SDRC region 0 public */ -} - /********************************************************** * Routine: try_unlock_sram() * Description: If chip is GP type, unlock the SRAM for diff --git a/cpu/omap3/sys_info.c b/cpu/omap3/sys_info.c index 77b25a5..09bd823 100644 --- a/cpu/omap3/sys_info.c +++ b/cpu/omap3/sys_info.c @@ -257,3 +257,36 @@ void get_sys_clkin_sel(u32 osc_clk, u32 *sys_clkin_sel) else if (osc_clk == S12M) *sys_clkin_sel = 0; } + +/* + * secure_unlock(void): setup security registers for access + * (GP Device only) + */ +void secure_unlock(void) +{ + /* Permission values for registers -Full fledged permissions to all */ + #define UNLOCK_1 0xFFFFFFFF + #define UNLOCK_2 0x00000000 + #define UNLOCK_3 0x0000FFFF + /* Protection Module Register Target APE (PM_RT)*/ + __raw_writel(UNLOCK_1, RT_REQ_INFO_PERMISSION_1); + __raw_writel(UNLOCK_1, RT_READ_PERMISSION_0); + __raw_writel(UNLOCK_1, RT_WRITE_PERMISSION_0); + __raw_writel(UNLOCK_2, RT_ADDR_MATCH_1); + + __raw_writel(UNLOCK_3, GPMC_REQ_INFO_PERMISSION_0); + __raw_writel(UNLOCK_3, GPMC_READ_PERMISSION_0); + __raw_writel(UNLOCK_3, GPMC_WRITE_PERMISSION_0); + + __raw_writel(UNLOCK_3, OCM_REQ_INFO_PERMISSION_0); + __raw_writel(UNLOCK_3, OCM_READ_PERMISSION_0); + __raw_writel(UNLOCK_3, OCM_WRITE_PERMISSION_0); + __raw_writel(UNLOCK_2, OCM_ADDR_MATCH_2); + + /* IVA Changes */ + __raw_writel(UNLOCK_3, IVA2_REQ_INFO_PERMISSION_0); + __raw_writel(UNLOCK_3, IVA2_READ_PERMISSION_0); + __raw_writel(UNLOCK_3, IVA2_WRITE_PERMISSION_0); + + __raw_writel(UNLOCK_1, SMS_RG_ATT0); /* SDRC region 0 public */ +} diff --git a/include/asm/arch-omap3/sys_proto.h b/include/asm/arch-omap3/sys_proto.h index 8b40822..7e768fa 100644 --- a/include/asm/arch-omap3/sys_proto.h +++ b/include/asm/arch-omap3/sys_proto.h @@ -54,6 +54,8 @@ u32 get_device_type(void); void get_sys_clkin_sel(u32 osc_clk, u32 *sys_clkin_sel); +void secure_unlock(void); + void sr32(u32 addr, u32 start_bit, u32 num_bits, u32 value); u32 wait_on_value(u32 read_bit_mask, u32 match_value, u32 read_addr, u32 bound); void sdelay(unsigned long loops);