From: Thara Gopinath <thara@ti.com>
Date: Tue, 8 Dec 2009 23:33:15 +0000 (-0700)
Subject: OMAP3: PM: Fix for MPU power domain MEM BANK position
X-Git-Tag: v2.6.33-rc1~295^2~1^2~22
X-Git-Url: http://git.openpandora.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=3863c74b512c1afd3ce6b2f81d8dea9f1d860968;p=pandora-kernel.git

OMAP3: PM: Fix for MPU power domain MEM BANK position

MPU power domain bank 0 bits are displayed in position of bank 1
in PWRSTS and PREPWRSTS registers. So read them from correct
position

Signed-off-by: Thara Gopinath <thara@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
---

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