From: Valentine Barshak <vbarshak@ru.mvista.com>
Date: Fri, 21 Sep 2007 14:50:09 +0000 (+1000)
Subject: [POWERPC] 4xx: 440EPx/GRx incorrect write to DDR SDRAM errata workaround
X-Git-Tag: v2.6.24-rc1~1450^2~122
X-Git-Url: http://git.openpandora.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=340ffd267c85fc28da7cfd681b177c816af800cf;p=pandora-kernel.git

[POWERPC] 4xx: 440EPx/GRx incorrect write to DDR SDRAM errata workaround

Add a workaround for PowerPC 440EPx/GRx incorrect write to
DDR SDRAM errata. Data can be written to wrong address
in SDRAM when write pipelining enabled on plb0. We disable
it in the cpu_setup for these processors at early init.

Signed-off-by: Valentine Barshak <vbarshak@ru.mvista.com>
Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
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