From: Len Brown <len.brown@intel.com>
Date: Sat, 2 Feb 2013 06:31:56 +0000 (-0500)
Subject: intel_idle: export both C1 and C1E
X-Git-Tag: v3.9-rc1~146^2^2~1^3~1
X-Git-Url: http://git.openpandora.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=32e9518005c8dd9ed668f40f98632c8186df4909;p=pandora-kernel.git

intel_idle: export both C1 and C1E

Here we disable HW promotion of C1 to C1E
and export both C1 and C1E and distinct C-states.

This allows a cpuidle governor to choose a lower latency
C-state than C1E when necessary to satisfy performance
and QOS constraints -- and still save power versus polling.
This also corrects the erroneous latency previously reported
for C1E -- it is 10usec, not 1usec.

Note that if you use "intel_idle.max_cstate=N",
then you must increment N by 1 to get the same behavior
after this change.

Signed-off-by: Len Brown <len.brown@intel.com>
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