From: Ville Syrjälä <ville.syrjala@linux.intel.com>
Date: Fri, 10 Apr 2015 15:21:27 +0000 (+0300)
Subject: drm/i915: Implement chv display PHY lane stagger setup
X-Git-Tag: omap-for-v4.2/fixes-rc1^2~17^2~54^2~7
X-Git-Url: http://git.openpandora.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=2e523e98bb593950de2c749d4ceb45cc20313c1a;p=pandora-kernel.git

drm/i915: Implement chv display PHY lane stagger setup

Set up the chv display PHY lane stagger registers according to
"Programming Guide for 1273 CHV eDP/DP/HDMI Display PHY" v1.04

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by:  Deepak S <deepak.s@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
---

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