From: David Daney <ddaney@caviumnetworks.com>
Date: Tue, 28 Dec 2010 02:07:57 +0000 (-0800)
Subject: MIPS: Optimize TLB handlers for Octeon CPUs
X-Git-Tag: v2.6.38-rc1~4^2~16
X-Git-Url: http://git.openpandora.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=2c8c53e28f178577dfdf3a69731b998b7e3df8ae;p=pandora-kernel.git

MIPS: Optimize TLB handlers for Octeon CPUs

Octeon can use scratch registers in the TLB handlers.  Octeon II can
use LDX instructions.

Signed-off-by: David Daney <ddaney@caviumnetworks.com>
To: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/1904/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
---

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