From: Hal Feng Date: Sun, 8 Dec 2024 09:19:42 +0000 (+0800) Subject: riscv: cpu: jh7110: Sort the list of imply statements X-Git-Tag: v2025.04-rc1~17^2~41^2~6 X-Git-Url: http://git.openpandora.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=2c1cb8837bd0e790d1ec5554955067632817aad2;p=pandora-u-boot.git riscv: cpu: jh7110: Sort the list of imply statements The imply statements should be sorted in the sequence of appearance in .config. Tested-by: Anand Moon Tested-by: E Shattow Suggested-by: Heinrich Schuchardt Signed-off-by: Hal Feng --- diff --git a/arch/riscv/cpu/jh7110/Kconfig b/arch/riscv/cpu/jh7110/Kconfig index 9904a60dddb..fa47e55226e 100644 --- a/arch/riscv/cpu/jh7110/Kconfig +++ b/arch/riscv/cpu/jh7110/Kconfig @@ -16,17 +16,17 @@ config STARFIVE_JH7110 select SYS_CACHE_SHIFT_6 select SPL_ZERO_MEM_BEFORE_USE select PINCTRL_STARFIVE_JH7110 + imply SMP + imply SPL_RISCV_ACLINT + imply SIFIVE_CACHE + imply SPL_SYS_MALLOC_CLEAR_ON_INIT + imply SPL_LOAD_FIT + imply SPL_CPU + imply SPL_OPENSBI + imply OF_UPSTREAM + imply SIFIVE_CCACHE imply MMC imply MMC_BROKEN_CD imply MMC_SPI - imply OF_UPSTREAM - imply RISCV_TIMER if (RISCV_SMODE || SPL_RISCV_SMODE) - imply SIFIVE_CACHE - imply SIFIVE_CCACHE - imply SMP imply SPI - imply SPL_CPU - imply SPL_LOAD_FIT - imply SPL_OPENSBI - imply SPL_RISCV_ACLINT - imply SPL_SYS_MALLOC_CLEAR_ON_INIT + imply RISCV_TIMER if (RISCV_SMODE || SPL_RISCV_SMODE)